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FPGA Programming for Beginners

You're reading from   FPGA Programming for Beginners Bring your ideas to life by creating hardware designs and electronic circuits with SystemVerilog

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Product type Paperback
Published in Mar 2021
Publisher Packt
ISBN-13 9781789805413
Length 368 pages
Edition 1st Edition
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Author (1):
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Frank Bruno Frank Bruno
Author Profile Icon Frank Bruno
Frank Bruno
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Toc

Table of Contents (16) Chapters Close

Preface 1. Section 1: Introduction to FPGAs and Xilinx Architectures
2. Chapter 1: Introduction to FPGA Architectures and Xilinx Vivado FREE CHAPTER 3. Section 2: Introduction to Verilog RTL Design, Simulation, and Implementation
4. Chapter 2: Combinational Logic 5. Chapter 3: Counting Button Presses 6. Chapter 4: Let's Build a Calculator 7. Chapter 5: FPGA Resources and How to Use Them 8. Chapter 6: Math, Parallelism, and Pipelined Design 9. Section 3: Interfacing with External Components
10. Chapter 7: Introduction to AXI 11. Chapter 8: Lots of Data? MIG and DDR2 12. Chapter 9: A Better Way to Display – VGA 13. Chapter 10: Bringing It All Together 14. Chapter 11: Advanced Topics 15. Other Books You May Enjoy

Questions

  1. What are the advantages of an I2C bus?

    a) We can move large amounts of data quickly.

    b) We only need two wires to communicate.

    c) Multiple devices can be connected using only two wires.

    d) All of the above.

    e) Only (b) and (c).

  2. What would be the preferred order of preference when you require a memory?

    a) Use the IP catalog, infer, use xpm_memory

    b) Use xpm_memory, use the IP catalog, infer

    c) Infer, use xpm_memory, use the IP catalog

    d) Use the IP catalog, use xpm_memory, infer

  3. assign data = (data_en) ? 'z : '0;

    a) Infers a multiplier

    b) Infers a register

    c) Infers a tristate IO

  4. Gray coding is used in FIFOs.

    a) Always

    b) To pass counter information across clock domains in an asynchronous FIFO

    c) Only in synchronous FIFOs

The following code creates what kind of memory?

always @(posedge clk) begin
  if (wren) store[addr] <= din;
  dout <= store[addr];
end

a) Simple dual port

b) True dual port

c) Single port

d) ROM

...
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