A PIO example – the i8042

To help make things clearer, let's look at a few code snippets from the device driver for the i8042 keyboard and mouse controller, which, though nowadays considered quite old, is still very common on x86 systems.

You can find a basic schematic of the 8042 controller here: https://wiki.osdev.org/File:Ps2-kbc.png.

The interesting bits (for us, at least) are in the driver's header file:

// drivers/input/serio/i8042-io.h
/*
 * Register numbers.
 */
#define I8042_COMMAND_REG   0x64
#define I8042_STATUS_REG    0x64
#define I8042_DATA_REG      0x60

In the preceding code snippet, we can see the I/O ports or hardware registers that this driver works with. How come the status and data registers resolve to the same I/O port (0x64) address? The direction matters: reading it has I/O port 0x64 behave as the status register, while writing to it has it behave as the command register! Furthermore, the datasheet will show you that these are...