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Modern Computer Architecture and Organization

You're reading from   Modern Computer Architecture and Organization Learn x86, ARM, and RISC-V architectures and the design of smartphones, PCs, and cloud servers

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Product type Paperback
Published in Apr 2020
Publisher Packt
ISBN-13 9781838984397
Length 560 pages
Edition 1st Edition
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Author (1):
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Jim Ledin Jim Ledin
Author Profile Icon Jim Ledin
Jim Ledin
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Toc

Table of Contents (20) Chapters Close

Preface 1. Section 1: Fundamentals of Computer Architecture
2. Chapter 1: Introducing Computer Architecture FREE CHAPTER 3. Chapter 2: Digital Logic 4. Chapter 3: Processor Elements 5. Chapter 4: Computer System Components 6. Chapter 5: Hardware-Software Interface 7. Chapter 6: Specialized Computing Domains 8. Section 2: Processor Architectures and Instruction Sets
9. Chapter 7: Processor and Memory Architectures 10. Chapter 8: Performance-Enhancing Techniques 11. Chapter 9: Specialized Processor Extensions 12. Chapter 10: Modern Processor Architectures and Instruction Sets 13. Chapter 11: The RISC-V Architecture and Instruction Set 14. Section 3: Applications of Computer Architecture
15. Chapter 12: Processor Virtualization 16. Chapter 13: Domain-Specific Computer Architectures 17. Chapter 14: Future Directions in Computer Architectures 18. Answers to Exercises 19. Other Books You May Enjoy

Exercises

  1. Rate monotonic scheduling (RMS) is an algorithm for assigning thread priorities in preemptive, hard, real-time applications in which threads execute periodically. RMS assigns the highest priority to the thread with the shortest execution period, the next-highest priority to the thread with the next-shortest execution period, and so on. An RMS system is schedulable, meaning all tasks are guaranteed to meet their deadlines (assuming no inter-thread interactions or other activities such as interrupts cause processing delays) if the following condition is met:

    This formula represents the maximum fraction of available processing time that can be consumed by n threads. In this formula, Ci is the maximum execution time required for thread i, and Ti is the execution period of thread i.

    Is the following system composed of three threads schedulable?

  2. A commonly used form of the one-dimensional discrete cosine transform is as follows:

    In this formula, k, the index of the DCT coefficient...

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